[Open_electroporator] ADC measuring shows need for redo of kvboard layout

[Nathan McCorkle]

hmm

On Wed, Dec 27, 2017 at 1:06 PM, John Griessen <john at cibolo.com> wrote:

> Schematic changes are in for  current sense, probe compensation, cover
> lockout.
>
> https://github.com/kanzure/culture_shock/blob/master/hardwar
> e_schematics_layouts/kvboard-sm.png
> https://github.com/kanzure/culture_shock/blob/master/hardwar
> e_schematics_layouts/kvboard.sch
>
> The volts are 0.08V when the current-to-voltage resistor shunt is  1/1000
> of the target 30000 Ohm load,
> and output is at 2400V.  I have not read ADC function yet, so asking here
> if that is a good range top.
>

Hmm, it sounds like 0.08V * 1000 == 80V would be too high to then measure
since the ADC will top out at 3.3V I think (or a little under the
full-range, as you say in your next email, 3.1). But I guess that math is
wrong, so I am misunderstanding you.
Are you saying out of 3.1V range, 2400kV on the HV side of the pulser
produces only 0.08V on the ADC? That seems out of proportion too.


>
> Or to say it another way, "Is the ADC using much resolution at 0.08V and
> lower?"
>

Not sure what you mean. Please restate.

The ADC is a 12-bit, 2^12 == 4096 bins/quantizations
3.1/4096 == 0.00075683593 volts per level.

I would think with 4096 levels, why not scale from 8192 volts to 3.1 volts?
That'd be a voltage divider of 2642.6 to one.

I don't think we'll ever need to go down as far as <10 volts of
programmability... and 8kV would let us see transients and also maybe
detect error/damage conditions.


-- 
-Nathan
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